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A novel full-bridge DC-DC configuration with a tapped transformer and secondary side control is proposed. It achieves zero-voltage switching for the primary side switches and zero-current switching for the secondary side switches, under all operating conditions. The conduction losses are significantly lower than those in the conventional soft-switching DC-DC converters. Due to superior filter waveforms, the filter requirements, both at the input and at the output, are significantly reduced. The features of the proposed converter are compared with those for the conventional phase-modulated full-bridge DC-DC converters. The proposed configuration is ideally suited for the AC-DC stage of high-power battery-charging applications with a power-factor-corrected preregulator. Analytical and experimental results on a 500 W/100 kHz prototype are presented  相似文献   
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The concept of "standards" is introduced for the design of power acceptability curves. The power acceptability curves are aides in the determination of whether the supply voltage to a load is acceptable for the maintenance of a load process. The construction of the well-known Computer Business Equipment Manufacturing Association (CBEMA) power acceptability curve is discussed, and issues of 3-phase and rotating loads are discussed.  相似文献   
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This paper investigates certain novel switching sequences involving division of active vector time for space vector based pulsewidth modulation (PWM) generation for a voltage source inverter. This paper proposes two new sequences, and identifies all possible sequences, which result in the same average switching frequency as conventional space vector PWM (CSVPWM) at a given sampling frequency. This paper brings out a method for designing hybrid PWM techniques involving multiple sequences to reduce line current ripple. The three proposed hybrid PWM techniques (three-zone PWM, five-zone PWM and seven zone PWM) employ three, five and seven different sequences, respectively, in every sector. Each sequence is employed in a spatial region within the sector where it results in the lowest rms current ripple over the given sampling period. The proposed techniques lead to a significant reduction in THD over CSVPWM at high line voltages. The five-zone technique results in the lowest THD among real-time techniques with uniform sampling, while the seven-zone technique is the best among real-time techniques with twin sampling rates. The superior harmonic performance of the proposed techniques over CSVPWM and existing bus-clamping PWM techniques is established theoretically as well as experimentally.  相似文献   
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Manju  S.  Muniappan  A.  C.Thiagarajan  Ravindiran  M.  Madhu  S.  Gurumoorthy  G. 《SILICON》2022,14(15):9283-9290
Silicon - Efficiency optimization of the photovoltaic devices is based on the device structure and the materials used in the device which has the ability to absorb the maximum light incident on the...  相似文献   
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